PART |
Description |
Maker |
BBS-15 BBS-1/4 BBS-2/10 BBS-1-8/10 BBS-10 BBS-1-6/ |
72-Mbit QDR-II SRAM 2-Word Burst Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit DDR-II SRAM 2-Word Burst Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 36-Mbit QDR-II SRAM 4-Word Burst Architecture Fuse 256K (32K x 8) Static RAM 64/256/512/1K/2K/4K x 18 Synchronous FIFOs Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Neuron® Chip Network Processor 64-Kbit (8K x 8) Static RAM 72-Mbit QDR™-II SRAM 2-Word Burst Architecture 保险
|
NXP Semiconductors N.V.
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CY7C1316BV18 CY7C1318BV18 CY7C1916BV18 CY7C1320BV1 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst结构,18-Mbit DDR-II SRAM) 18兆位的DDR - II SRAM字突发架构(2字突发结18 -兆位的DDR - II SRAM的) 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2瀛?urst缁??,18-Mbit DDR-II SRAM)
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
UPD42S16100LLA-A80 UPD42S16100LG3-A80-7JD UPD42S17 |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 9-Mbit (256K x 32) Pipelined DCD Sync SRAM 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM x1 Fast Page Mode DRAM x1快速页面模式的DRAM
|
TOKO, Inc. EPCOS AG
|
CAT93C46AJ CAT93C46AJI CAT93C46AJI-2.5 CAT93C46AJ- |
72-Mbit QDR-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 72-Mbit QDR-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 256K (32K x 8) Static RAM 256 Kb (256K x 1) Static RAM 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) Microwire Serial EEPROM 微型导线串行EEPROM
|
Atmel, Corp.
|
CY7C1165V18 CY7C1163V18 CY7C1161V18 CY7C1176V18 CY |
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 QDR SRAM, 0.45 ns, PBGA165 18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18兆位的国防评估报告⑩- II SRAM字突发架构(2.5周期读写延迟 18-Mbit QDR??II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
PD46184184BF1-E40-EQ1 PD46185084BF1-E40-EQ1 PD4618 |
18M-BIT DDR II SRAM 4-WORD BURST OPERATION 18M-BIT QDRTM II SRAM 4-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
CY7C1310BV18-167BZC CY7C1314BV18 CY7C1910BV18 CY7C |
18-Mbit QDR垄芒-II SRAM 2 Word Burst Architecture 18-Mbit QDR??II SRAM 2 Word Burst Architecture 18-Mbit QDR?II SRAM 2 Word Burst Architecture
|
Cypress Semiconductor http://
|
CY7C1565V18-300BZI |
72-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
R1Q2A3609 R1Q2A3636 R1Q2A3618 R1Q2A3609ABG-60R R1Q |
36-Mbit QDRII SRAM 2-word Burst 36-Mbit QDR™II SRAM 2-word Burst
|
Renesas Electronics Corporation. Renesas Electronics, Corp.
|